1. Field of the Invention
This disclosure relates generally to computer processors, and more particularly to dynamically allocating tag values between instructions in different threads of a computer processor.
2. Description of the Related Art
Some computer processors support out-of-order execution, meaning that execution results for instructions in a computer program are not necessarily computed in the order in which the instructions appear in the program (which is referred to as “program order.”) Out-of-order processors typically commit (retire) instructions in program order, regardless of the order in which these instructions are actually executed. Otherwise, an incorrect processor state may result.
To maintain program order, instructions can be assigned sequence numbers. A first instruction may receive a first sequence number, and a second, subsequent instruction may receive a second sequence number indicating that the second instruction is subsequent to the first instruction in program order. The sequence numbers ensure that the second instruction, which may overtake the first instruction during an out-of-order execution of the two instructions, is not committed before the first instruction. If execution results are determined for the second instruction before determining execution results for the first instruction, a processor may delay committing the second instruction until determining that all other instructions that have a sequence number “earlier” than the second instruction's sequence number have been committed.